This article considers progressive cracking upon thermal cycling of a thin
multilayer on a thick substrate. The prototypical system comprises a thin e
lastic layer of a dielectric material above another thin metal interconnect
layer attached to a silicon substrate. Residual stresses exist because of
the thermal expansion misfit and due to deposition. Putative fabrication fl
aws are presumed to be present in the dielectric. When activated by residua
l stresses these flaws can induce cracks that channel along the dielectric.
Conditions that induce yielding of the metal upon initial cooling are show
n to exacerbate this phenomenon. Moreover subsequent thermal cycling may in
duce ratcheting, wherein cracks develop progressively due to repeated yield
ing of the metal layer The roles of initial stress, cyclic temperature ampl
itude, and interconnect yield strength in these phenomena are investigated
using finite element models which explicitly account for cyclic yielding. T
he most deleterious situation is found to be that wherein the entire metal
layer reaches yield at some stage during the temperature cycle. Several sce
narios relevant to semiconductor devices are considered.