A CMOS monolithic image-reject filter

Citation
Yy. Chang et al., A CMOS monolithic image-reject filter, ANALOG IN C, 28(1), 2001, pp. 43-51
Citations number
12
Language
INGLESE
art.tipo
Article
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
ISSN journal
0925-1030 → ACNP
Volume
28
Issue
1
Year of publication
2001
Pages
43 - 51
Database
ISI
SICI code
0925-1030(200107)28:1<43:ACMIF>2.0.ZU;2-4
Abstract
A CMOS inductorless image-reject filter based on active RLC circuitry is di scussed and designed with the emphasis on low-noise, low-power, and gigaher tz-range circuits. Two Q-enhancement techniques are utilized to circumvent the low Q characteristics inherent in the simple feedback circuit. The freq uency tuning is almost independent of Q tuning, facilitating the design of the automatic tuning circuitry. The stability and the tuning scheme of the filter are also discussed. Simulations using 0.6 mum CMOS technology demons trate the feasibility of the tunable image-reject filter for GSM wireless a pplications. Simulation results show 4.75 dB voltage gain, 9.5 dB noise fig ure, and -20 dBm IIP3 at a passband centered at 947 MHz. The image signal s uppression is 60 dB at 1089 MHz and the power consumption is 27 mW.