K. Iizuka et al., CDMA functional blocks using recycling integrator correlators - Matched filters and delay-locked loops, IEEE J SOLI, 36(3), 2001, pp. 385-397
The recycling integrator correlator (RIC) is a novel approach for implement
ing correlators that consumes less power than conventional digital or analo
g CMOS correlators, The RIC modulates the product of a received signal and
a pseudorandom noise (PN) sequence into a bit stream by first-order Delta S
igma modulation. The accumulated number represents the quantized correlatio
n value. Using RICs, two functional blocks of a direct sequence code divisi
on multiple access (DS-CDMA) demodulator targeting IMT-2000, a matched filt
er (MF) and a delay locked-loop (DLL) are implemented in silicon. In the fa
bricated 256-tap QPSK MF-RIC, two 256-tap double-sampling MFs sample the I
and Q received analog signals at a rate of 8 Msample/s, Their outputs are 9
-bit quantized correlation values with a 256-chip PN sequence at the same r
ate as the sampling rate. The DLL-RIC can adapt to spreading ratios from 32
to 256 with the use of an auxiliary ADC that can compensate the degradatio
n of dynamic range when the spreading ratio is small. Processed in a 0.35-m
um CMOS process, the MF-RIC and the DLL-RIC, respectively, occupy 22.8 and
2.28 mm(2) and dissipate 23.0 and 3.4 mW at 2-V power supply.