Interconnect design strategy: Structures, repeaters and materials with strategic system performance analysis (S(2)PAL) model

Citation
S. Takahashi et al., Interconnect design strategy: Structures, repeaters and materials with strategic system performance analysis (S(2)PAL) model, IEEE DEVICE, 48(2), 2001, pp. 239-251
Citations number
16
Language
INGLESE
art.tipo
Article
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON ELECTRON DEVICES
ISSN journal
0018-9383 → ACNP
Volume
48
Issue
2
Year of publication
2001
Pages
239 - 251
Database
ISI
SICI code
0018-9383(200102)48:2<239:IDSSRA>2.0.ZU;2-0
Abstract
In this paper, we propose a novel methodology for scheming interconnect str ategy, such as what interconnect structure should be taken, how repeaters s hould be inserted, and when new metal or dielectric materials should be ado pted. In the methodology, the strategic system performance analysis model i s newly developed as a calculation model that predicts LSI operation freque ncy and chip size with electrical parameters of transistors and interconnec ts as well as circuit configuration. The analysis with the model indicates that interconnect delay overcomes circuit block cycle time at a specific le ngth; Dc-cross Here tentatively, interconnects shorter than Dc-cross are ca lled as local interconnects, and interconnects longer than that as global o nes. The cross-sectional structures for local and global tiers are optimize d separately. We also calculate global interconnect pitch and the chip size enlarged by the global interconnect pitch and the inserted repeaters, and then estimate the effectiveness' of introducing new materials for interconn ects and dielectrics.