High performance fully selective double recess InAlAs/InGaAs/InP HEMT's

Citation
Sc. Wang et al., High performance fully selective double recess InAlAs/InGaAs/InP HEMT's, IEEE ELEC D, 21(7), 2000, pp. 335-337
Citations number
9
Language
INGLESE
art.tipo
Article
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE ELECTRON DEVICE LETTERS
ISSN journal
0741-3106 → ACNP
Volume
21
Issue
7
Year of publication
2000
Pages
335 - 337
Database
ISI
SICI code
0741-3106(200007)21:7<335:HPFSDR>2.0.ZU;2-F
Abstract
InP HEMT's with double recess 0.12 mu m gate have been developed. The mater ial structure was designed to be fully selective etched at both recess step s for improved uniformity and yield across the whole wafer. Devices demonst rated de characteristics of extrinsic transconductances of 1000 mS/mm, maxi mum current density of 800 mA/mm and gate-drain reverse breakdown voltages of -7.8 V. Power measurements were performed at both 20 GHz and 60 GHz. At 20 GHz, the 6 x 75 mu m devices yielded 65% maximum power added efficiency( PAE) with associated gain of 13.5 dB and output power of 185 mW/mm. When tu ned for maximum output power, it gave an output power density of 670 mW/mm with 15.6 dB gain and 49% PAE, At 60 GHz, maximum PAE of 40% has been measu red with associated output power density of 290 mW/mm and gain of 7.4 dB. T his represents the best power performance reported for InP-based double rec ess HEMT's.