DMILL1 technology integrates mixed analog-digital very rad-hard (>10 Mrad a
nd >10(14) neutron/cm(2)) vertical bipolar, 0.8 mu m CMOS and 1.2 mu m PJFE
T transistors on SOI2 substrate. In this paper, after a presentation of the
DMILL program goal, we discuss in more detail the main technological choic
es, the main milestones from the R&D to the industrial implementation, and
the main results obtained after stabilization of the final process-flow in
the MHS3 foundry.