Results: 1-5 |
Results: 5

Authors: Nishinohara, KT Akasaka, Y Saito, T Yagishita, A Murakoshi, A Suguro, K Arikado, T
Citation: Kt. Nishinohara et al., Surface channel metal gate complementary MOS with light counter doping andsingle work function gate electrode, JPN J A P 1, 40(4B), 2001, pp. 2603-2606

Authors: Yagishita, A Saito, T Nakajima, K Inumiya, S Matsuo, K Shibata, T Tsunashima, Y Suguro, K Arikado, T
Citation: A. Yagishita et al., Improvement of threshold voltage deviation in damascene metal gate transistors, IEEE DEVICE, 48(8), 2001, pp. 1604-1611

Authors: Inumiya, S Yagishita, A Saito, T Hotta, M Ozawa, Y Suguro, K Tsunashima, Y Arikado, T
Citation: S. Inumiya et al., Sub-1.3 nm amorphous tantalum pentoxide gate dielectrics for damascene metal gate transistors, JPN J A P 1, 39(4B), 2000, pp. 2087-2093

Authors: Yagishita, A Saito, T Nakajima, K Inumiya, S Akasaka, Y Ozawa, Y Hieda, K Tsunashima, Y Suguro, K Arikado, T Okumura, K
Citation: A. Yagishita et al., High performance damascene metal gate MOSFET's for 0.1 mu m regime, IEEE DEVICE, 47(5), 2000, pp. 1028-1034

Authors: Saito, T Yagishita, A Inumiya, S Nakajima, K Akasaka, Y Ozawa, Y Yano, H Hieda, K Suguro, K Arikado, T Okumura, K
Citation: T. Saito et al., Plasma-damage-free gate process using chemical mechanical polishing for 0.1 mu m MOSFETs, JPN J A P 1, 38(4B), 1999, pp. 2227-2231
Risultati: 1-5 |