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Table of contents of journal: *IEEE electron device letters

Results: 1-25/183

Authors: Zhang, NQ Keller, S Parish, G Heikman, S DenBaars, SP Mishra, UK
Citation: Nq. Zhang et al., High breakdown GaNHEMT with overlapping gate structure, IEEE ELEC D, 21(9), 2000, pp. 421-423

Authors: Blanchard, RR Cornet, A del Alamo, JA
Citation: Rr. Blanchard et al., Titanium hydride formation in Ti/Pt/Au-gated InPHEMTs, IEEE ELEC D, 21(9), 2000, pp. 424-426

Authors: Wang, H Ng, GI Zheng, HQ Xiong, YZ Chua, LH Yuan, KH Radhakrishnan, K Yoon, SF
Citation: H. Wang et al., Demonstration of aluminum-free metamorphic InP/Tn(0.53)Ga(0.47)As/InP double heterojunction bipolar transistors on GaAs substrates, IEEE ELEC D, 21(9), 2000, pp. 427-429

Authors: Luo, TY Laughery, M Brown, GA Al-Shareef, HN Watt, VHC Karamcheti, A Jackson, MD Huff, HR
Citation: Ty. Luo et al., Effect of H-2 content on reliability of ultrathin in-situ steam generated (ISSG) SiO2, IEEE ELEC D, 21(9), 2000, pp. 430-432

Authors: Yeung, MS Barouch, E
Citation: Ms. Yeung et E. Barouch, Limitation of the Kirchhoff boundary conditions for aerial image simulation in 157-nm optical lithography, IEEE ELEC D, 21(9), 2000, pp. 433-435

Authors: El-Bahar, A Stolyarova, S Nemirovsky, Y
Citation: A. El-bahar et al., N-type porous silicon doping using phosphorous oxychloride (POCl3), IEEE ELEC D, 21(9), 2000, pp. 436-438

Authors: Wang, HM Chan, MS Jagar, S Wang, YY Ko, PK
Citation: Hm. Wang et al., Submicron super TFTs for 3-D VLSI applications, IEEE ELEC D, 21(9), 2000, pp. 439-441

Authors: Wu, YH Chin, A Shih, KH Wu, CC Liao, CP Pai, SC Chi, CC
Citation: Yh. Wu et al., Fabrication of very high resistivity Si with low loss and cross talk, IEEE ELEC D, 21(9), 2000, pp. 442-444

Authors: Oh, SH Monroe, D Hergenrother, JM
Citation: Sh. Oh et al., Analytic description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETs, IEEE ELEC D, 21(9), 2000, pp. 445-447

Authors: Huang, HJ Chen, KM Chang, CY Chen, LP Huang, GW Huang, TY
Citation: Hj. Huang et al., Reduction of source/drain series resistance and its impact on device performance for PMOS transistors with raised Si1-xGex source/drain, IEEE ELEC D, 21(9), 2000, pp. 448-450

Authors: Lutze, J Miranda, T Scott, G Olsen, C Variam, N Mehta, S
Citation: J. Lutze et al., Optimization of implant anneals to improve transistor performance in a 0.15 mu m CMOS technology, IEEE ELEC D, 21(9), 2000, pp. 451-453

Authors: Barlage, DW O'Keeffe, JT Kavalieros, JT Nguyen, MM Chau, RS
Citation: Dw. Barlage et al., Inversion MOS capacitance extraction for high-leakage dielectrics using a transmission line equivalent circuit, IEEE ELEC D, 21(9), 2000, pp. 454-456

Authors: Chang, SJ Chang, CY Chen, CM Chou, JW Chao, TS Huang, TY
Citation: Sj. Chang et al., An anomalous crossover in Vth roll-off for indium-doped nMOSFETs, IEEE ELEC D, 21(9), 2000, pp. 457-459

Authors: Chang, CY Chang, SJ Chao, TS Wu, SD Huang, TY
Citation: Cy. Chang et al., Reduced reverse narrow channel effect in thin SOI nMOSFETs, IEEE ELEC D, 21(9), 2000, pp. 460-462

Authors: You, BD Temple, VAK Huang, AQ Holroyd, F
Citation: Bd. You et al., High channel density dual operation mode MOS-controlled thyristor with superior current saturation capability, IEEE ELEC D, 21(9), 2000, pp. 463-465

Authors: Ma, PX Yang, YF Zampardi, P Huang, RT Chang, MF
Citation: Px. Ma et al., Modulating HBT's current gain by using externally biased on-ledge Schottkydiode, IEEE ELEC D, 21(8), 2000, pp. 373-375

Authors: Jung, JW Roh, JS Lee, YJ Lee, KH
Citation: Jw. Jung et al., Two-step rapid thermal annealing (TS-RTA) to suppress out-diffusion of dopants without degrading short channel effect of transistor, IEEE ELEC D, 21(8), 2000, pp. 376-377

Authors: Pan, TM Lei, TF Chao, TS
Citation: Tm. Pan et al., Robust ultrathin oxynitride dielectrics by NH3 nitridation and N2O RTA treatment, IEEE ELEC D, 21(8), 2000, pp. 378-380

Authors: Chang, SJ Chang, CY Chao, TS Zhong, SZ Yeh, WK Huang, TY
Citation: Sj. Chang et al., A novel sacrificial gate stack process for suppression of boron penetration in p-MOSFET with shallow BF2-implanted source/drain extension, IEEE ELEC D, 21(8), 2000, pp. 381-383

Authors: Hong, CM Wagner, S
Citation: Cm. Hong et S. Wagner, Inkjet printed copper source/drain metallization for amorphous silicon thin-film transistors, IEEE ELEC D, 21(8), 2000, pp. 384-386

Authors: Takato, H Shimokawa, R
Citation: H. Takato et R. Shimokawa, Optical confinement in thin-film crystalline silicon solar cells by adhesive bonding of ceramic substrate, IEEE ELEC D, 21(8), 2000, pp. 387-389

Authors: Kleveland, B Maloney, TJ Morgan, I Madden, L Lee, TH Wong, SS
Citation: B. Kleveland et al., Distributed ESD protection for high-speed integrated circuits, IEEE ELEC D, 21(8), 2000, pp. 390-392

Authors: Eo, Y Hyun, S Lee, K Oh, G Lee, JW
Citation: Y. Eo et al., Reference SAW oscillator on quartz-on-silicon (QoS) wafer for polylithic integration of true single chip radio, IEEE ELEC D, 21(8), 2000, pp. 393-395

Authors: Majima, H Ishikuro, H Hiramoto, T
Citation: H. Majima et al., Experimental evidence for quantum mechanical narrow channel effect in ultra-narrow MOSFET's, IEEE ELEC D, 21(8), 2000, pp. 396-398

Authors: Cho, MK Kim, DM
Citation: Mk. Cho et Dm. Kim, High performance SONGS memory cells free of drain turn-on and over-erase: Compatibility issue with current flash technology, IEEE ELEC D, 21(8), 2000, pp. 399-401
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