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Table of contents of journal: *IEEE electron device letters

Results: 1-25/153

Authors: LIU S LAMP D GANGOPADHYAY S SREENIVAS G ANG SS NASEEM HA
Citation: S. Liu et al., A NEW METAL-TO-METAL ANTIFUSE WITH AMORPHOUS-CARBON, IEEE electron device letters, 19(9), 1998, pp. 317-319

Authors: LIU HW CHENG HC
Citation: Hw. Liu et Hc. Cheng, EXCELLENT LOW-PRESSURE-OXIDIZED SI3N4 FILMS ON ROUGHENED POLY-SI FOR HIGH-DENSITY DRAMS, IEEE electron device letters, 19(9), 1998, pp. 320-322

Authors: SINITSKY D TANG S JANGITY A ASSADERAGHI F SHAHIDI G HU CM
Citation: D. Sinitsky et al., SIMULATION OF SOI DEVICES AND CIRCUITS USING BSIM3SOI, IEEE electron device letters, 19(9), 1998, pp. 323-325

Authors: HUANG FJ O KK
Citation: Fj. Huang et Kk. O, SCHOTTKY-CLAMPED NMOS TRANSISTORS IMPLEMENTED IN A CONVENTIONAL 0.8-MU-M CMOS PROCESS, IEEE electron device letters, 19(9), 1998, pp. 326-328

Authors: VANDOVER RB SCHNEEMEYER LF
Citation: Rb. Vandover et Lf. Schneemeyer, DEPOSITION OF UNIFORM ZR-SN-TI-O FILMS BY ON-AXIS REACTIVE SPUTTERING, IEEE electron device letters, 19(9), 1998, pp. 329-331

Authors: CHEN JF ISHIMARU K HU CM
Citation: Jf. Chen et al., ENHANCED HOT-CARRIER-INDUCED DEGRADATION IN SHALLOW TRENCH-ISOLATED NARROW CHANNEL PMOSFETS, IEEE electron device letters, 19(9), 1998, pp. 332-334

Authors: YOON JK KIM JH
Citation: Jk. Yoon et Jh. Kim, DEVICE ANALYSIS FOR A-SI-H THIN-FILM TRANSISTORS WITH ORGANIC PASSIVATION LAYER, IEEE electron device letters, 19(9), 1998, pp. 335-337

Authors: LHEURETTE E MELIQUE X MOUNAIX P MOLLOT F VANBESIEN O LIPPENS D
Citation: E. Lheurette et al., CAPACITANCE ENGINEERING FOR INP-BASED HETEROSTRUCTURE BARRIER VARACTOR, IEEE electron device letters, 19(9), 1998, pp. 338-340

Authors: LU Q PARK D KALNITSKY A CHANG C CHENG CC TAY SP KING TJ HU CM
Citation: Q. Lu et al., LEAKAGE CURRENT COMPARISON BETWEEN ULTRA-THIN TA2O5 FILMS AND CONVENTIONAL GATE DIELECTRICS, IEEE electron device letters, 19(9), 1998, pp. 341-342

Authors: GIUST GK SIGMON TW CAREY PG WEISS B DAVIS GA
Citation: Gk. Giust et al., LOW-TEMPERATURE POLYSILICON THIN-FILM TRANSISTORS FABRICATED FROM LASER-PROCESSED SPUTTERED-SILICON FILMS, IEEE electron device letters, 19(9), 1998, pp. 343-344

Authors: ZAKNOUNE M BONTE B GAQUIERE C CORDIER Y DRUELLE Y THERON D CROSNIER Y
Citation: M. Zaknoune et al., INALAS INGAAS METAMORPHIC HEMT WITH HIGH-CURRENT DENSITY AND HIGH BREAKDOWN VOLTAGE/, IEEE electron device letters, 19(9), 1998, pp. 345-347

Authors: TSAI JY SHI Y PRASAD S YEH SWC RAKKHIT R
Citation: Jy. Tsai et al., SLIGHT GATE OXIDE THICKNESS INCREASE IN PMOS DEVICES WITH BF2 IMPLANTED POLYSILICON GATE, IEEE electron device letters, 19(9), 1998, pp. 348-350

Authors: TSENG YC HUANG WM DIAZ DC FORD JM WOO JCS
Citation: Yc. Tseng et al., AC FLOATING-BODY EFFECTS IN SUBMICRON FULLY DEPLETED (FD) SOI NMOSFETS AND THE IMPACT ON ANALOG APPLICATIONS, IEEE electron device letters, 19(9), 1998, pp. 351-353

Authors: GHODSI R SHARIFZADEH S MAJJIGA J
Citation: R. Ghodsi et al., GATE-INDUCED DRAIN-LEAKAGE IN BURIED-CHANNEL PMOS - A LIMITING FACTORIN DEVELOPMENT OF LOW-COST, HIGH-PERFORMANCE 3.3-V, 0.25-MU-M TECHNOLOGY, IEEE electron device letters, 19(9), 1998, pp. 354-356

Authors: BERA LK RAY SK MUKHOPADHYAY M NAYAK DK USAMI N SHIRAKI Y MAITI CK
Citation: Lk. Bera et al., ELECTRICAL-PROPERTIES OF N2O NH3 PLASMA GROWN OXYNITRIDE ON STRAINED-SI/, IEEE electron device letters, 19(8), 1998, pp. 273-275

Authors: CHEN MJ LEE HS CHEN JH HOU CS LIN CS JOU YN
Citation: Mj. Chen et al., A PHYSICAL MODEL FOR THE CORRELATION BETWEEN HOLDING VOLTAGE AND HOLDING CURRENT IN EPITAXIAL CMOS LATCH-UP, IEEE electron device letters, 19(8), 1998, pp. 276-278

Authors: LI HF DIMITRIJEV S HARRISON HB
Citation: Hf. Li et al., IMPROVED RELIABILITY OF NO-NITRIDED SIO2 GROWN ON P-TYPE 4H-SIC, IEEE electron device letters, 19(8), 1998, pp. 279-281

Authors: BASHIR R WANG F GREIG W MCGREGOR JM YINDEEPOL W DESANTIS J
Citation: R. Bashir et al., BACK-GATED BURIED OXIDE MOSFETS IN A HIGH-VOLTAGE BIPOLAR TECHNOLOGY FOR BONDED OXIDE SOI INTERFACE CHARACTERIZATION, IEEE electron device letters, 19(8), 1998, pp. 282-284

Authors: RIBAS RP LESCOT J LECLERCQ JL BENNOURI N KARAM JM
Citation: Rp. Ribas et al., MICROMACHINED PLANAR SPIRAL INDUCTOR IN STANDARD GAAS HEMT MMIC TECHNOLOGY, IEEE electron device letters, 19(8), 1998, pp. 285-287

Authors: NIU GF CRESSLER JD GOGINENI U HARAME DL
Citation: Gf. Niu et al., COLLECTOR-BASE JUNCTION AVALANCHE MULTIPLICATION EFFECTS IN ADVANCED UHV CVD SIGE HBTS/, IEEE electron device letters, 19(8), 1998, pp. 288-290

Authors: CAO M VOORDE PV COX M GREENE W
Citation: M. Cao et al., BORON-DIFFUSION AND PENETRATION IN ULTRATHIN OXIDE WITH POLY-SI GATE, IEEE electron device letters, 19(8), 1998, pp. 291-293

Authors: WU KH FANG YK HO JJ HSIEH WT CHEN TJ
Citation: Kh. Wu et al., NOVEL SIC SI HETEROSTRUCTURE NEGATIVE-DIFFERENTIAL-RESISTANCE DIODE FOR USE AS SWITCH WITH HIGH ON/OFF CURRENT RATIO AND LOW-POWER DISSIPATION/, IEEE electron device letters, 19(8), 1998, pp. 294-296

Authors: SHIN H GAESSLER C LEIER H
Citation: H. Shin et al., REDUCTION OF BASE-COLLECTOR CAPACITANCE IN INP INGAAS HBTS USING A NOVEL DOUBLE POLYIMIDE PLANARIZATION PROCESS/, IEEE electron device letters, 19(8), 1998, pp. 297-299

Authors: ONDA K FUJIHARA A WAKEJIMA A MIZUKI E NAKAYAMA T MIYAMOTO H ANDO Y KANAMORI M
Citation: K. Onda et al., INALAS INGAAS CHANNEL COMPOSITION MODULATED TRANSISTORS WITH INAS CHANNEL AND ALAS/INAS SUPERLATTICE BARRIER LAYER/, IEEE electron device letters, 19(8), 1998, pp. 300-302

Authors: KURISHIMA K YAMAHATA S NAKAJIMA H ITO H WATANABE N
Citation: K. Kurishima et al., INITIAL DEGRADATION OF BASE-EMITTER JUNCTION IN CARBON-DOPED INP INGAAS HBTS UNDER BIAS AND TEMPERATURE STRESS/, IEEE electron device letters, 19(8), 1998, pp. 303-305
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